View TEA1064A_83808.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

INTEGRATED CIRCUITS
DATA SHEET
TEA1064A Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
Product specification File under Integrated Circuits, IC03A March 1994
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
GENERAL DESCRIPTION The TEA1064A is a bipolar integrated circuit that performs all the speech and line interface functions required in fully electronic telephone sets. It performs electronic switching between dialling and speech and has a powerful DC supply for peripheral circuits. The IC operates at line voltages down to 1.8 V DC (with reduced performance) to facilitate the use of more telephone sets connected in parallel. The transmit signal on the line is dynamically limited (speech-controlled) to prevent distortion at high transmit levels of both the sending signal and the sidetone. FEATURES * Low DC line voltage; operates down to 1.8 V (excluding polarity guard) * Voltage regulator with low voltage drop and adjustable static resistance * DC line voltage adjustment facility * Provides a supply for external circuits in two options: unregulated supply, regulated line voltage; stabilized supply, line voltage varies with supply current * Dynamic limiting (speech-controlled) in transmit direction prevents distortion of line signal and sidetone * Symmetrical high-impedance inputs (64 k) for dynamic, magnetic or piezo-electric microphones * Asymmetrical high-impedance input (32 k) for electret microphones * DTMF signal input * Confidence tone in the earpiece during DTMF dialling * Mute input for disabling speech during pulse or DTMF dialling * Power-down input for improved performance during pulse dial or register recall (flash) * Receiving amplifier for magnetic, dynamic or piezo-electric earpieces * Large amplification setting ranges on microphone and earpiece amplifiers * Line loss compensation (line current dependent) for microphone and earpiece amplifiers (not used for DTMF amplifier) * Gain control curve adaptable to exchange supply * Automatic disabling of the DTMF amplifier in extremely-low voltage conditions * Microphone MUTE function available with switch PACKAGE OUTLINES
TEA1064A
TEA1064A :20-lead DIL; plastic (SOT146).(1) TEA1064AT:20-lead mini-pack; plastic (SO20; SOT163A).(2) Notes 1. SOT146-1; 1998 Jun 18. 2. SOT163-1; 1998 Jun 18.
March 1994
2
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
TEA1064A
handbook, full pagewidth
VCC1 16 13
LN 1 6 GAR QR+ QR-
IR
- TEA1064A +
+ -
5 4
19 MIC+ MIC- 9 8
VCC2 GAS1
+ - +
dB
2
- +
3 GAS2
DTMF MUTE PD
12 14 15
-
SUPPLY AND REFERENCE AGC CIRCUIT LOW VOLTAGE CIRCUIT
DYNAMIC LIMITER
CURRENT REFERENCE 11 VEE 17 REG 18 AGC 10 STAB
START CIRCUIT 7 DLS/MMUTE 20 SLPE
MGR056
Fig.1 Block diagram.
March 1994
3
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
QUICK REFERENCE DATA PARAMETER Operating ambient temperature range Line current operating range: normal operation with reduced performance Internal supply current: power-down input LOW power-down input HIGH Voltage gain range: microphone amplifier receiving amplifier Line loss compensation: gain control range exchange supply voltage range exchange feeding bridge resistance range Maximum output voltage swing on LN (peak-to-peak value) R15 + R16 = 448 lline = 15 mA Ip = 2 mA Ip = 4 mA Regulated line voltage application R15 = 0 ; R16 = 392 Supply for peripherals lline = 15 mA Ip = 1.4 mA Ip = 2.7 mA; RREG-SLPE = 20 k DC line voltage lline = 15 mA without RREG-SLPE RREG-SLPE = 20 k VLN VLN - - 3.57 4.57 Vp 2.9 - Vp 2.5 - VLN(p-p) VLN(p-p) 3.7 3.0 3.95 3.25 Rexch 400 - Vexch 36 - Gv 5.7 6.1 Gv Gv 44 20 - - VCC1 = 2.8 V VCC1 = 2.8 V ICC1 ICC1 - - 1.3 60 lline lline 11 2 - - Tamb -25 - CONDITIONS SYMBOL MIN. TYP.
TEA1064A
MAX. + 75 140(1) 11 1.6 82 52 45 6.5 60 1000
UNIT C mA mA mA A dB dB dB V
4.2 3.5
V V
- - - -
V V V V
March 1994
4
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
PARAMETER Stabilized supply voltage application R15 = 392 ; R16 = 56 Supply for peripherals DC line voltage lline = 15 mA Ip = 0 to 4 mA lline = 15 mA Ip = 2 mA Ip = 4 mA Note VLN VLN 4.2 4.9 4.4 5.1 VCC2-SLPE 3.05 3.3 CONDITIONS SYMBOL MIN. TYP.
TEA1064A
MAX.
UNIT
3.55 4.8 5.5
V V V
1. For TEA1064AT the maximum line current depends on the heat dissipating qualities of the mounted device. PINNING 1 LN 2 GAS1
handbook, halfpage
positive line terminal gain adjustment; transmitting amplifier gain adjustment; transmitting amplifier inverting output, receiving amplifier non-inverting output, receiving amplifier gain adjustment; receiving amplifier decoupling for transmit amplifier dynamic and microphone MUTE input inverting microphone input non-inverting microphone input current stabilizer negative line terminal dual-tone multi-frequency input receiving amplifier input mute input power-down input internal supply decoupling voltage regulator decoupling automatic gain control input reference voltage with respect to SLPE slope adjustment for DC curve/reference for peripheral circuits.
LN 1 GAS1 2 GAS2 3 QR- 4 QR+ 5
20 SLPE 19 VCC2 18 AGC 17 REG 16 VCC1
3 GAS2 4 QR- 5 QR+ 6 GAR 7 DLS/ MMUTE 8 MIC- 9 MIC+ 10 STAB 11 VEE 12 DTMF 13 IR 14 MUTE 15 PD 16 VCC1 17 REG 18 AGC 19 VCC2
TEA1064A
GAR 6 DLS/MMUTE 7 MIC- 8 MIC+ 9 STAB 10
MGR057
15 PD 14 MUTE 13 IR 12 DTMF 11 VEE
Fig.2 Pinning diagram.
20 SLPE
March 1994
5
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
FUNCTIONAL DESCRIPTION Supplies VCC1, VCC2, LN, SLPE, REG and STAB (Fig.3) Power for the TEA1064A and its peripheral circuits is usually obtained from the telephone line. The IC develops its own supply voltage at VCC1 and regulates its voltage drop. The internal supply requires a decoupling capacitor between VCC1 and VEE. The internal current stabilizer is set by a 3.6 k resistor between STAB and VEE. The DC current flowing into the set is determined by the exchange supply voltage Vexch, the feeding bridge resistance Rexch, the subscriber line DC resistance Rline and the DC voltage (including polarity guard) on the subscriber set (see Fig.3). The internal voltage regulator generates a temperature-compensated reference voltage that is available between VCC2 and SLPE [Vref = VCC2-SLPE = 3.3 V (typ.)]. This internal voltage regulator requires decoupling by a capacitor between REG and VEE (C3). The reference voltage can be used to:
TEA1064A
* regulate directly the line voltage (stabilized VLN-SLPE = VCC2-SLPE)(1) * to stabilize the supply voltage for peripherals.
Regulated line voltage
In this application the VCC2 pin is connected to the LN pin as shown in Fig.3. This configuration gives a stabilized voltage across pins LN and SLPE which, applied via the low-pass filter R16, C15, provides a supply to the peripherals that is independent of the line current and depends only on the peripheral supply current. The value of R16 and the level of the DC voltage VLN-SLPE determine the supply capabilities. In the basic application R16 = 392 and C15 = 220 F. The worst-case peripheral supply current as a function of supply voltage is shown in Fig.4. To increase the supply capabilities, the DC voltage VLN-SLPE can be increased by using RVA(REG-SLPE) or by decreasing the value of R16.
(1) The TEA1064A application with regulated line voltage is the same as is used for TEA1060/TEA1061, TEA1067 and TEA1068 integrated circuits.
handbook, full pagewidth
Ip + 0.25 mA Rline Iline ISLPE LN Rexch 1 R1 ICC1 VCC1 16 19 VCC2 0.25 mA
TEA1064A
DC AC
C1
R16
Vexch
17 REG C3
10 STAB R5
20 SLPE
11 VEE C15 Ip peripheral circuits
R9
Vp
MGR058
The voltage VLN-SLPE is fixed to Vref = 3.3 0.25 V. Resistor R16 together with the line current determine the supply capabilities and the maximum output swing on the line (no loop damping is necessary). The line voltage VLN = Vref + ([Iline - 1.55 mA] x R9).
Fig.3 Application with regulated line voltage (stabilized VLN-SLPE).
March 1994
6
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
The DC line voltage on LN is:
handbook, halfpage
TEA1064A
5
MGR059
VLN = VLN-SLPE + (ISLPE x R9) VLN = Vref + ([Iline - ICC1 - 0.25 x 10-3 A] x R9) in which Vref = 3.3 V 0.25 V is the internal reference voltage between VCC2 and SLPE; its value can be adjusted by external resistor RVA R9 = external resistor between SLPE and VEE (20 in basic application). With R9 = 20 , this results in: VLN = 3.57 0.25 V at lline = 15 mA VLN = 4.17 0.3 V at lline = 15 mA, RVA(REG-SLPE) = 33 k
Ip
(mA) 4
3
RV A (R -S EG
2
A RV
LP E) = 20 k
t E) ou SLP th wi EG(R
1
0
2
3
4
Vp (V)
VLN = 4.57 0.35 V at lline = 15 mA, RVA(REG-SLPE) = 20 k The preferred value for R9 is 20 . Changing R9 influences microphone gain, DTMF gain, the gain control characteristics, sidetone, and the DC characteristics (especially the low voltage characteristics). In normal conditions, ISLPE >> (ICC1 + 0.25 mA) and the static behaviour is equivalent to a voltage regulator diode with an internal resistance of R9. In the audio frequency range the dynamic impedance is determined mainly by R1. The equivalent impedance of the circuit in the audio frequency range is shown in Fig.6. The internal reference voltage VCC2-SLPE can be increased by external resistor RVA(REG-SLPE) connected between REG and SLPE. The supply voltage VCC2-SLPE is shown as a function of RVA(REG-SLPE) in Fig.7. Changing the reference voltage influences the output swing of both sending and receiving amplifiers. At line currents below 8 mA (typ.), the DC voltage dropped across the circuit is adjusted to a lower level automatically (approximately 1.8 V at 2 mA). This gives the possibility of operating more telephone sets in parallel with DC line voltages (excluding polarity guard) down to an absolute minimum of 1.8 V. At line currents below 8 mA (typ.), the circuit has limited sending and receiving levels.
lline = 15 mA; R16 = 392 ; R15 = 0 ; valid for MUTE = 0 and 1. Line current has very little influence
Fig.4
Minimum supply current for peripherals (Ip) as a function of the peripheral supply voltage (Vp).
The maximum AC output swing on the line at low line currents is influenced by R16 (limited by current) and the maximum output swing on the line at high line currents is influenced by the DC voltage VLN-SLPE (limited by voltage). In both these situations, the internal dynamic limiter in the sending channel prevents distortion when the microphone input is overdriven. The maximum AC output swing on LN is shown in Fig.5; practical values for R16 are from 200 to 600 and this influences both the maximum output swing at low line currents and the supply capabilities. The SLPE pin is the ground reference for peripheral circuits, therefore inputs MUTE, PD and DTMF are also referenced to SLPE. Active microphones can be supplied between VCC1 and VEE. Low-power circuits that provide only MUTE and/or PD inputs to the TEA1064A also can be powered from VCC1. However VCC1 cannot be used for circuits that provide DTMF signals to the TEA1064A because VCC1 is referred to ground. If the line current lline exceeds ICC1 + 0.25 mA, the voltage converter shunts the excess current to SLPE via LN; where ICC1 1.3 mA, the value required by the IC for normal operation.
March 1994
7
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
TEA1064A
handbook, halfpage
6
MGR060
VLN(p-p) (V) 4
handbook, halfpage
LN Leq Vref Rp REG C3 4.7 F R1 VCC1 C1 VEE
Ip = 2 0 mA 2 mA 4 mA R9 20
MGR061
0 10
20
Iline (mA)
30
Fig.6 Fig.5 Maximum AC output swing on the line as a function of line current with peripheral supply current as a parameter: R15 = 0 ; R16 = 392 .
Equivalent impedance between LN and VEE in the application with stabilized VLN-SLPE: R15 = 0 Leq = C3 x R9 x Rp Rp = 15 k
handbook, full pagewidth
7.8 Vref (V) 6.6
MGR062
5.4
4.2 with RVA infinite 3.0 0 40 80 RVA (REG-SLPE) (k) 120
Fig.7
Internal reference voltage VCC2-SLPE as a function of resistor RVA(REG-SLPE) for line currents between 11 and 140 mA. In the stabilized supply application: VLN = VCC2-SLPE + ([Ip + 0.25 x 10-3 A] x R15) + ([Iline - 1.55 x 10-3 A] x R9) In the unregulated supply application (R15 = 0 ): VLN = VCC2-SLPE + ([Iline - 1.55 x 10-3 A] x R9)
March 1994
8
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
Stabilized peripheral supply voltage
The configuration shown in Fig.8 provides a stabilized voltage across pins VCC2 and SLPE for peripheral circuits (such as dialling and control circuits); the DC voltage VLN now varies with the peripheral supply current. The VCC2-SLPE supply must be decoupled by capacitor C15. For stable loop operation, resistor R16 ( 50 ) is connected between VCC2 and SLPE in series with C15. The voltage regulator control loop is completed by resistor R15 between LN and VCC2. For sets with an impedance of 600 , practical values are: R15 = 200 to 600 ; C15 = 220 F; C3 = 470 nF. The ratio R15/R16 8 is for stable loop operation with sufficient phase margin, and R15/R16 6 is for satisfactory set impedance in the audio frequency range. For sets with complex impedance, the value of C3 and the ratio R15/R16 are different (further information is given in the TEA1064A Application Report(1)). The peripheral supply capability depends mainly on the available line current, the required AC output swing on the line, the maximum permitted DC voltage on the line and
TEA1064A
the values of external components (especially R15). With R15 = 392 and R16 = 56 (basic application) the maximum possible AC output swing on the line as a function of line current is as shown in Fig.9, the curve parameter is the peripheral supply current (Ip). Different values for R15 (from 200 to 600 ) maintaining 6 < R15/R16 < 8 give different results (these are described in the TEA1064A Application Report (1).
(1) Supplied on request.
handbook, full pagewidth
R15 Rline Iline ISLPE LN Rexch 1 R1 ICC1
Ip + 0.25 mA
VCC1 16 19 VCC2 0.25 mA
TEA1064A
DC AC
C1
R16
Vexch
17 REG C3
10 STAB R5
20 SLPE
11 VEE C15 Ip peripheral circuits
R9
Vp
MGR063
Fig.8 Application with stabilized supply voltage for peripheral circuits: R15 = 392 ; R16 = 56 .
March 1994
9
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
The DC line voltage on LN is VLN = VLN-SLPE + (ISLPE x R9). Therefore VLN = Vref + ([Ip + 0.25 x 10-3 A] x R15) + ([lline - ICC1 - 0.25 x 10-3 A] x R9) in which: Vref is the internal reference voltage between VCC2 and SLPE (the value of Vref can be adjusted by an external resistor, RVA). Vref = 3.3 V (typ.) without RVA Ip is the supply current used by peripheral circuits R15 is an external resistor between LN and VCC2 (392 in the basic application) R9 is an external resistor between SLPE and VEE (20 in the basic application)
3.5
TEA1064A
MGR065
handbook, halfpage
5.5
VLN-SLPE (V) 5.0 R15 = 511 392 4.5 301 4.0
3.0 0 1 2 3 Ip (mA) 4
handbook, halfpage
8
MGR064
VCC2-SLPE can be adjusted between approximately 3.3 and 4.3 V by changing the value of RVA, this results in a parallel-shift of the curves. The total voltage drop VLN VLN-SLPE + ([Iline - 1.55 mA] x R9).
VLN(p-p) (V) 6
Ip = 4 mA
2 mA
Fig.10 Curves showing the typical voltage drop between LN and SLPE as a function of the supply current for peripherals with R15 as a parameter: VCC2-SLPE = 3.3 V (RVA not connected).
4
0 mA
2
handbook, halfpage
LN Leq Req C3 470 nF R1 620
0 10 20 Iline (mA) 30
R9 20
As different values of R15 and R16 are allowed, different curves would then apply
MGR066
VEE
Fig.9
Maximum output swing on line as a function of line current with the peripheral supply current as a parameter; R15 = 392 ; R16 = 56 .
R15 R eq = R p ---------- + 1 R16 L eq = C3 x R9 x R eq with R p = 15 k
The DC voltage VLN-SLPE as a function of Ip with R15 as a parameter is shown in Fig.10. In the audio frequency range, the dynamic impedance is determined mainly by R1. The equivalent impedance in the audio range of the circuit (Fig.8) is shown in Fig.11.
Fig.11 Equivalent impedance between LN and VEE at f > 300 Hz in the application with stabilized supply voltage for peripheral circuits.
March 1994
10
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
Microphone inputs MIC+ and MIC- and gain pins GAS1 and GAS2 The TEA1064A has symmetrical microphone inputs, its input impedance is 64 k (2 x 32 k) and its voltage amplification is typ. 52 dB with R7 = 68 k. Either dynamic, magnetic or piezo-electric microphones can be used, or an electret microphone with a built-in FET buffer. Arrangements for the microphone types are shown in Fig.12.
TEA1064A
The gain of the microphone amplifier is proportional to external resistor R7 connected between GAS1 and GAS2 and with this it can be adjusted between 44 dB and 52 dB to suit the sensitivity of the transducer. An external 100 pF capacitor (C6) is required between GAS1 and SLPE to ensure stability. A larger value of C6 may be chosen to obtain a first-order low-pass filter with a cut-off frequency corresponding to the time constant R7 x C6.
handbook, full pagewidth
VCC1 MIC+ 9
(1)
MIC- 8
16
MIC+ 9
MIC-
8
MIC+
9 11 VEE
MIC-
8
MGR067
(a)
(b)
(c)
Fig.12 Microphone arrangements: a) magnetic or dynamic microphone, the resistor (1) may be connected to reduce the terminating impedance, or for sensitive types a resistive attenuator can be used to prevent overloading the microphone inputs; b) electret microphone; c) piezo-electric microphone.
Dynamic limiter (microphone) pin DLS/MMUTE A low level at the DLS/MMUTE pin inhibits the microphone inputs MIC+ and MIC- but has no influence on the receiving and DTMF amplifiers. Removing the low level at the DLS/MMUTE pin provides the normal function of the microphone amplifier after a short time determined by the capacitor connected to DLS/MMUTE pin. The microphone mute function can be realised by a simple switch as shown in Fig.13. To prevent distortion of the transmitted signal, the gain of the sending amplifier is reduced rapidly when peaks of the signal on the line exceed an internally-determined threshold. The time in which gain reduction is effected (attack time) is very short. The circuit stays in the gain-reduced condition until the peaks of the sending signal remain below the threshold level. The sending gain then returns to normal after a time determined by the capacitor connected to DLS/MMUTE (release time). The internal threshold adapts automatically to the DC voltage setting of the circuit (voltage VLN-SLPE). This
means that the maximum output swing on the line will be higher if the DC voltage dropped across the circuit is increased. Fig.14 shows the maximum possible output swing on the line as a function of the DC voltage drop (VLN-SLPE) with Iline - Ip as a parameter.
handbook, halfpage
DLS/MMUTE R17 3.3 k
7
VEE
11
MGR068
Fig.13 Microphone-mute function.
March 1994
11
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
TEA1064A
handbook, full pagewidth
10 VLN(p-p) (V) 8
MGR069
Iline-Ip (mA) 25 23 21
6
19 17 15 13 11
4
2
0
3
3.5
4
4.5
5.5 5 VLN-VSLPE (V)
Fig.14 Maximum output swing on line as a function of the DC voltage drop VLN-SLPE with lline - Ip as a parameter: R15 = 392 ; R16 = 56 ; or R15 = 0 and R16 = 392 + 56 = 448 .
The internal threshold level is lowered automatically if the DC current in the transmit output stage is insufficient. This prevents distortion of the sending signal in applications using parallel-connected telephones or telephones operating over long lines, for example. Dynamic limiting also considerably improves sidetone performance in over-drive conditions (less distortion; limited sidetone level).
Receiving amplifier IR, QR+, QR- and GAR The receiving amplifier has one input IR and two complementary outputs, QR+ (non-inverting) and QR- (inverting). These outputs may be used for single-ended or differential drive, depending on the type and sensitivity of the earpiece used (see Fig.15). Gain from IR to QR+ is typically 31 dB with R4 = 100 k, sufficient for low-impedance magnetic or dynamic earpieces which are suitable for single-ended drive. By using both outputs (differential drive) the gain is increased by 6 dB. Differential drive can be used when the earpiece impedance exceeds 450 as with high-impedance dynamic, magnetic or piezo-electric earpieces.
handbook, full pagewidth
5 4 11
QR+ QR- VEE
5
QR+
5
QR+
(1)
5
QR+
(2)
4
QR-
4
QR-
4
QR-
MGR070
(a)
(b)
(c)
(d)
Fig.15 Alternative receiver arrangements: a) dynamic earpiece with an impedance less than 450 ; b) dynamic earpiece with an impedance more than 450 ; c) magnetic earpiece with an impedance more than 450 , resistor (1) may be connected to prevent distortion (inductive load); d) piezo-electric earpiece, resistor (2) is required to increase the phase margin (stability with capacitive load).
March 1994
12
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
The output voltage of the receiving amplifier is specified for continuous-wave drive. Fig.16 shows the maximum output swing of the receiving amplifier as a function of the DC voltage drop (VLN). The maximum output voltage will be higher under speech conditions, where the ratio of the peak to the RMS value is higher. The gain of the receiving amplifier can be adjusted to suit the sensitivity of the transducer used. The adjustment range is between 20 dB and 39 dB with single-ended drive and between 26 dB and 45 dB with differential drive. The gain is proportional to the external resistor R4 connected between GAR and QR+. The overall gain between LN and QR+ can be found by subtracting the attenuation of the anti-sidetone network (32 dB) from the amplifier gain.
TEA1064A
Two external capacitors (C4 =100 pF and C7 = 10 x C4 = 1 nF) ensure stability. A larger value may be chosen to obtain a first-order low-pass filter. The cut-off frequency corresponds with the time constant R4 x C4. The relationship C7 = 10 x C4 must be maintained.
handbook, halfpage
1.5
MGR071
VQR(rms) (V) 1.0
(1)
(2)
0.5
(3)
Curve (1) is for a differential load of 47 nF (series resistance = 100 ); f = 3400 Hz. Curve (2) is for a differential load of 450 ; f = 1 kHz. Curve (3) is for a single-ended load of 150 ; f = 1 kHz.
0
3
4
5
VLN (V)
6
Fig.16 Maximum output swing of the receiving amplifier as a function of DC voltage drop VLN with the load at the receiver output as parameter: valid for both supply options; THD = 2%; Iline = 15 mA.
Automatic gain control input AGC Automatic compensation of line loss is obtained by connecting a resistor (R6) between AGC and VEE. This automatic gain control varies the gain of the microphone amplifier and receiving amplifier in accordance with the DC line current. The control range is 6.1 dB; this corresponds to a 5 km line of 0.5 mm diameter copper twisted-pair cable (DC resistance = 176 /km, average attenuation = 1.2 dB/km). The DTMF gain is not affected by this feature.
The value of R6 must be chosen with reference to the exchange supply voltage and its feeding bridge resistance (see Fig.17 and Table 1). Different values of R6 give the same line current ratios at the start and the end of the control range. If automatic line-loss compensation is not required the AGC pin can be left open, the amplifiers then give their maximum gain.
March 1994
13
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
handbook, full pagewidth
TEA1064A
Avd (dB)
0 -1 -2 -3 -4 -5 -6 10 20 30 40 50
R6 =
MGR072
R6 =
66.5 k
93.1 k
118 k
60
70
80 Iline (mA)
90
Fig.17 Variation of gain as a function of line current with R6 as a parameter; R9 = 20 .
Table 1
Values of R6 giving optimum line-loss compensation at various values of exchange supply voltage (Vexch) and exchange feeding bridge resistance (Rexch); R9 = 20 . Rexch () 400 36 84.5 118 X 600 66.5 93.1 X 800 R6 (k) X 77.8 97.6 X 66.5 84.5 1000
setting the gain of the microphone amplifier. With R7 = 68 k the gain is typically 26 dB. The signalling tones can be heard in the earpiece at a low level (confidence tone). Power-down input PD (see notes 1. and 2.) During pulse dialling or register recall (timed loop break) the telephone line is interrupted; as a consequence it provides no supply for the transmission circuit connected to VCC1 or for the peripherals between VCC2 and SLPE. These supply gaps are bridged by the charges in the capacitors C1 and C15. The requirements on these capacitors are eased by applying a HIGH level to the PD input during the time of the loop break. This reduces the internal supply current ICC1 from (typ.) 1.3 mA to (typ.) 60 A and switches off the voltage regulator to prevent discharge via LN and VCC2. A HIGH level at PD also internally disconnects the capacitor at REG so that the voltage stabilizer has no switch-on delay after line interruptions. This minimizes the contribution of the IC to the current waveform during pulse dialling or register recall. When the power-down facility is not required, the PD pin can be left open-circuit or connected to SLPE. Side-tone suppression Suppression of the transmitted signal in the earpiece is obtained by the anti-sidetone network comprising R1//Zline, 14
Vexch (V)
48 60
MUTE input (see notes 1. and 2.) MUTE = HIGH enables the DTMF input and inhibits the microphone and receiving amplifier inputs. MUTE = LOW or open-circuit disables the DTMF input and enables the microphone and receiving amplifier inputs. Switching MUTE gives negligible clicks at the telephone outputs and on the line. Dual-tone multi-frequency input DTMF (see note 1.) When the DTMF input is enabled, dialling tones may be sent on to the line. The voltage gain between DTMF-SLPE and LN-VEE is typ. 26 dB less than the gain of the microphone amplifier and varies with R7 in the same way as the gain of the microphone amplifier. This means that the tone level at the DTMF input has to be adjusted after
March 1994
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
R2, R3, R8, R9 and Zbal (see Fig.18). Maximum compensation is obtained when the following conditions are fulfilled: a) R9 x R2 = R1 x (R3 + [R8//Zbal]) b) (Zbal/[Zbal + R8]) = (Zline/[Zline + R1]) If fixed values are chosen for R1, R2, R3 and R9, then condition a) is always fulfilled provided R8//Zbal << R3. To obtain optimum sidetone suppression, condition b) has to be fulfilled, resulting in: Zbal = (R8/R1) x Zline = k x Zline where k is a scale factor; k = (R8/R1). The scale factor k (value of R8) is chosen to meet the following criteria: * compatibility with a standard capacitor from the E6 or E12 range for Zbal; * Zbal//R8 << R3 to fulfil condition a) and thus ensure correct anti-sidetone bridge operation; * Zbal + R8 >> R9 to avoid influencing the transmit gain. In practice Zline varies considerably with the line length and line type. Therefore the value chosen for Zbal should be for an average line length giving satisfactory sidetone suppression with short and long lines. The suppression also depends on the accuracy of the match between Zbal and the impedance of the average line.
TEA1064A
Example
The line impedance for which optimum suppression is to be obtained can be represented by 210 + (1265 // 140 nF). This represents a 5 km line of 0.5 mm diameter copper twisted-pair cable matched with 600 (176 /km; 38 nF/km). With k = 0.64 this results in: R8 = 390 ; Zbal = 130 + (820 // 220 nF). The anti-sidetone network for the TEA1060 family shown in Fig.18 attenuates the signal received from the line by 32 dB before it enters the receiving amplifier. The attenuation is almost constant over the whole audio-frequency range. Alternatively a conventional Wheatstone bridge can be used as an anti-sidetone circuit (Fig.19). Both bridge types can be used with either resistive or complex set impedances. (More information on the balancing of anti-sidetone bridges can be obtained in our publication "Versatile speech transmission ICs for electronic telephone sets", order number 9398 341 10011). Notes 1. The reference used for the MUTE, DTMF and PD inputs is SLPE. 2. A LOW level for any of these pins is defined by connection to SLPE, a HIGH level is defined as a voltage greater than VSLPE + 1.5 V and smaller than VCC1 + 0.4 V.
March 1994
15
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
TEA1064A
handbook, full pagewidth
LN
Zline
R1
R2
VEE
im R3 R9 R8 SLPE Zbal
IR Rt
MGR073
Fig.18 Equivalent circuit of TEA1060 family anti-side-tone bridge.
handbook, full pagewidth
LN
Zline
R1
Zbal
VEE
im
IR Rt
R9
R8
RA
SLPE
MGR074
Fig.19 Equivalent circuit of an anti-sidetone network in the Wheatstone bridge configuration.
March 1994
16
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
RATINGS Limiting values in accordance with the Absolute Maximum System (IEC 134) PARAMETER Positive line voltage continuous Repetitive line voltage during switch-on line interruption Repetitive peak line voltage one 1 ms pulse per 5 s R9 = 20 ; R10 = 13 (Fig.24) Line current TEA1064A (note 1) Line current TEA1064AT (note 1) Input voltage on pins other than LN and VCC2 Total power dissipation (note 2) TEA1064A TEA1064AT Storage temperature range Operating ambient temperature range Junction temperature Notes R9 = 20 Ptot Ptot Tstg Tamb Tj - - -40 -25 - 714 555 Vi VEE-0.7 R9 = 20 R9 = 20 VLN ILN ILN - - - 28 140 140 VLN - CONDITIONS SYMBOL VLN - MIN. 12
TEA1064A
MAX. V V
UNIT
13.2
V mA mA
VCC1 + 0.7 V mW mW C C C
+ 125 + 75 + 125
1. Mostly dependent on the maximum required Tamb and on the voltage between LN and SLPE. See Figs 20 and 21 to determine the current as a function of the required voltage and the temperature. 2. Calculated for the maximum ambient temperature specified Tamb = 75 C and a maximum junction temperature of 125 C. THERMAL RESISTANCE From junction to ambient in free air TEA1064A TEA1064AT mounted on glass epoxy board 41 x 19 x 1.5 mm Rth j-a Rth j-a = = 70 K/W 90 K/W
March 1994
17
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
TEA1064A
handbook, halfpage I
160 LN (mA) 140
MGR075
120
(1)
100
(2)
80
(3)
(4)
60
Tamb (1) (2) (3) (4) 45 C 55 C 65 C 75 C
Ptot 1143 mW 1000 mW 857 mW 714 mW
40 2 4 6 8 10 12 VLN-VSLPE (V)
Fig.20 TEA1064A safe operating area.
handbook, halfpage I
150 LN (mA) 130
MSA546
110
90
(1) (2)
70
(3)
50
(4)
Tamb (1) (2) (3) (4) 45 C 55 C 65 C 75 C
Ptot 888 mW 777 mW 666 mW 555 mW Fig.21 TEA1064AT safe operating area.
30 2 4 6 8 10 12 VLN-VSLPE (V)
March 1994
18
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
TEA1064A
CHARACTERISTICS Iline = 11 to 140 mA; VEE = 0 V; f = 800 Hz; Tamb = 25 C; RL = 600 ; tested in the circuit of Fig.22 or 23); unless otherwise specified PARAMETER Supplies LN, VCC1, VCC2 (pins 1, 16, 19) Reference DC voltage between VCC2 and SLPE RVA not connected Variation with temperature Variation with line current referred to 15 mA With RVA connected between REG and SLPE DC line voltage: voltage drop between LN and VEE MIC-, MIC+ inputs open; R15 = 392 ; without RVA at Iline = 15 mA Ip = 0 mA Ip = 2 mA Ip = 4 mA at Iline = 100 mA at Iline = 140 mA Voltage drop under low current conditions Ip = 0 mA Iline = 2 mA Iline = 4 mA Iline = 7 mA Iline = 11 mA Internal supply current ICC1: current into pin VCC1 VCC1 = 2.8 V PD = LOW PD = HIGH Microphone inputs MIC-, MIC+ (pins 8, 9) Input impedance: differential single-ended Common mode rejection ratio Zi Zi CMRR 51 25.5 - 64 32.0 82 77 38.5 - k k dB ICC1 ICC1 - - 1.3 60 1.6 82 mA A VLN VLN VLN VLN - - - - 1.8 2.2 3.2 3.5 - - - - V V V V Ip = 2 mA Ip = 2 mA VLN VLN VLN VLN VLN 3.4 4.2 4.9 - - 3.6 4.4 5.1 6.1 7.0 4.0 4.8 5.5 7.0 7.8 V V V V V RVA = 33 k RVA = 20 k VCC2-SLPE VCC2-SLPE 3.6 3.95 3.8 4.2 4.2 4.65 V V Iline = 100 mA VCC2-SLPE - 60 - mV Iline = 15 mA Iline = 15 mA Ip = 0; 4 mA VCC2-SLPE VCC2-SLPE/T 3.05 -3.0 3.3 -1.0 3.55 1.0 V mV/K CONDITIONS SYMBOL MIN. TYP. MAX. UNIT
March 1994
19
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
PARAMETER Voltage gain (see Fig.22) Variation of Gv with frequency, referred to 0.8 kHz Variation of Gv with temperature, referred to 25 C without R6; Iline = 50 mA; Tamb = -25 to + 75 C GvT DTMF input (pin 12) Input impedance Voltage gain (see Fig.22) Variation of Gv with frequency, referred to 0.8 kHz Variation of Gv with temperature, referred to 25 C Gain adjustment inputs GAS1, GAS2 (pins 2, 3) Transmitting amplifier, gain adjustment range Sending amplifier output LN (pin 1) Gv -8 - Iline = 50 mA; Tamb = -25 to + 75C GvT - 0.2 f = 300 and 3400 Hz f = 697 and 1633 Hz Gvf Gvf -0.5 -0.2 0.1 0.05 Iline = 15 mA; R7 = 68 k Gv 25 26 Zi 16.8 20.7 - 0.2 f = 300 and 3400 Hz Gvf -0.5 0.1 CONDITIONS Iline = 15 mA; R7 = 68 k Gv 51 52 SYMBOL MIN. TYP.
TEA1064A
MAX. 53 + 0.5
UNIT dB dB
-
dB
24.6 27 + 0.5 + 0.2
k dB dB dB
0.5
dB
+0
dB
Dynamic limiter
Output voltage swing (peak-to-peak value) Iline = 15 mA; R7 = 68 k; Ip = 0 mA; Vi(rms) = 3.6 mV Total harmonic distortion Output voltage swing (peak-to-peak value) Vi = 3.6 mV + 10 dB Ip = 2 mA Ip = 4 mA Ip = 0 mA; Iline = 7 mA Ip = 0 mA; Iline = 4 mA VLN(p-p) - 1 - V VLN(p-p) - 2 - V VLN(p-p) VLN(p-p) 3.7 3.0 3.95 3.25 4.2 3.5 V V Vi = 3.6 mV + 10 dB Vi = 3.6 mV + 15 dB VLN(p-p) THD THD 3.6 - - 4.0 1.5 2.8 4.5 2.0 10.0 V % %
March 1994
20
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
PARAMETER Dynamic behaviour of limiter attack time, Vmic jumps from 2 mV to 40 mV release time, Vmic jumps from 40 mV to 2 mV Noise output voltage (RMS value) lline = 15 mA; R7 = 68 k; 200 between MIC- and MIC+; psophometrically weighted (P53 curve) Vno(rms) Receiving amplifier input IR (pin 13) Input impedance Receiving amplifier outputs QR- QR+ (pins 4, 5) Output impedance Voltage gain single-ended Fig.23; Iline = 15 mA; R4 = 100 k single-ended; RT = 300 differential; RT = 600 Variation with frequency, referred to 0.8 kHz Variation with temperature, referred to 25 C without R6; Iline = 50 mA; Tamb = -25 to +75 C Output voltage (RMS value) THD = 2%; sinewave drive; R4 = 100 k; Iline = 15 mA single-ended; RT = 150 differential; RT = 450 differential; CT = 47 nF; (100 series resistor); f = 3400 Hz Ip = 0 mA Ip = 2 mA Vo(rms) Vo(rms) - - 0.57 0.9 Ip = 0 mA Ip = 2 mA Ip = 0 mA Ip = 2 mA Vo(rms) Vo(rms) Vo(rms) Vo(rms) - - - - 0.22 0.35 0.39 0.64 GvT - 0.2 f = 300 and 3400 Hz Gvf -0.5 -0.2 Gv Gv 30 36 31 37 Zo - 4 Zi 17 21 - -72 trel 50 150 tatt - 1.5 CONDITIONS C16 = 470 nF SYMBOL MIN. TYP.
TEA1064A
MAX.
UNIT
5.0 -
ms ms
-
dBmp
25
k
-
32 38 0
dB dB dB
-
dB
- - - - - -
V V V V V V
March 1994
21
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
PARAMETER Output voltage (RMS value) CONDITIONS Ip = 0 mA; THD = 10%; sinewave drive; R4 = 100 k; single-ended; RT = 150 ; Iline = 4 mA Iline = 7 mA Noise output voltage (RMS value) Iline = 15 mA; R4 = 100 k; psophometrically weighted (P53 curve); pin IR open single-ended; RT = 300 ; differential; RT = 600 Noise output voltage (RMS value) in circuit of Fig.23; S1 in position 2; 200 between MIC+ and MIC-; single-ended; RT = 300 R7 = 68 k R7 = 24.9 k Gain adjustment input GAR (pin 6) Receiving amplifier, gain adjustment range MUTE INPUT (pin 14) Input voltage HIGH Input voltage LOW Input current Change of microphone amplifier gain at mute-ON MUTE = HIGH -Gv - 100 VIH VIL Imute 1.5 + VSLPE 0 - - - 11 Gv -11 - Vno(rms) Vno(rms) - - 100 65 Vno(rms) - 90 Vno(rms) - 45 Vo(rms) Vo(rms) - - 25 160 SYMBOL MIN. TYP.
TEA1064A
MAX.
UNIT
- -
mV mV
- -
V V
- -
V V
+8
dB
VCC1 + 0.4 0.3 + VSLPE 20 -
V V A dB
March 1994
22
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
PARAMETER Voltage gain from input DTMF-SLPE to QR+ output with mute-ON MUTE = HIGH; single-ended load; RL = 300 CONDITIONS SYMBOL MIN. TYP.
TEA1064A
MAX.
UNIT
Gv
- 1.5 + VSLPE 0 -
-18
-
dB
Power-down input PD (pin 15) Input voltage HIGH Input voltage LOW Input current Automatic gain control input AGC (pin 18) Controlling the gain from IR (pin 13) to QR+, QR- (pins 4, 5) and the gain from MIC+, MIC- (pins 8, 9) to LN (pin 1) R6 = 93.1 k (between pins 18 and 11) Iline = 75 mA -Gv Iline Iline -Gv 5.7 - - 0.9 6.1 24 61 1.4 6.5 - - 1.9 dB mA mA dB VIH VIL IPD - - 5 VCC1 + 0.4 0.3 + VSLPE 10 V V A
gain control range with respect to Iline = 15 mA Highest line current for maximum gain Lowest line current for minimum gain Change of gain between Iline = 15 and 35 mA Microphone mute input DLS/MMUTE (pin 7) Input voltage low Input current at low input voltage Release time after a low level on pin 7 Change of microphone amplifier gain at low input voltage on pin 7 -Gv - 100 - dB C16 = 470 nF trel - 30 - ms IIL -85 -60 -35 A VIL VEE - VEE + 0.3 V
March 1994
23
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
TEA1064A
andbook, full pagewidth
R15 392 R1 19 16 620 1 LN QR- 4 100 F RL 600 R4 100 k C4 100 pF C7 1 nF 14 15 10 F C15 220 F 7 MUTE GAS1 PD DLS/MMUTE VEE REG 11 C16 470 nF 17 C3 470 nF GAS2 SLPE 20 R9 20
MGR076
Iline
VCC2 VCC1 13 IR R16 56 Vi C1 100 F 12 DTMF 9 8 MIC+
Vo
QR+ MIC-
5
TEA1064A
GAR
6
11 to 140 mA
2 R7 68 k
Ip
3
C6 100 pF
Vi
AGC 18 R6
STAB 10 R5 3.6 k
For measuring the gain from MIC+ and MIC- the MUTE input should be LOW or open-circuit; for measuring the DTMF input, the MUTE input should be HIGH. Inputs not being tested should be open-circuit.
Fig.22 Test circuit for defining voltage gain of MIC-, MIC+ and DTMF inputs; voltage gain (Gv) is defined as 20 log Vo / Vi .
March 1994
24
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
TEA1064A
R15 392 R1 R2 100 nF 2 R16 56 1 9 8 10 F Vi R3 3.92 k 12 14 15 7 130 R8 390 220 nF 130 k S1 13 19 IR MIC+ QR+ C1 100 F MIC- DTMF MUTE GAS1 PD DLS/MMUTE VEE REG 11 C16 470 nF 17 C3 470 nF GAS2 SLPE 20 R9 20
MGR077
Iline
620 16 1 LN QR- 4 10 F 100 F ZT 5 R4 100 k C4 100 pF C7 1 nF 2 R7 68 k Vo
VCC2 VCC1
RL 600
TEA1064A
GAR
6
11 to 140 mA
Ip
C15 220 F
3
C6 100 pF
AGC 18 R6
STAB 10 R5 3.6 k
820
Fig.23 Test circuit for defining voltage gain of the receiving amplifier, voltage gain (Gv) is defined as 20 log Vo / Vi (with S1 in position 1).
APPLICATION INFORMATION The basic application circuit is shown in Fig.24 and some typical applications are shown in Figs 25, 26 and 27. In the basic application, the circuit provides two possibilities for supplies to peripheral circuits: * regulated line voltage VLN (stabilized VLN-SLPE) and unregulated supply voltage for peripheral circuits, the supply voltage is dependent only on the peripheral supply current. This application is the same as that used for TEA1060/TEA1061, TEA1067 and TEA1068; * stabilized supply voltage for peripherals (VCC2-SLPE), the DC line voltage depends on the current flowing to the peripheral circuits.
March 1994
25
handbook, full pagewidth
This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... March 1994
R10 13 BAS11 (2x) R2 130 k 1 C5 100 nF 4 telephone BZW14 line (2x) R13 R3 3.92 k R4 100 k C7 C4 100 pF 6 1 nF 9 R14 8 MIC- SLPE GAS1 GAS2 20 R8 390 Zbal R9 20 C6 100 pF 2 3 R7 68 k REG 17 C3 470 nF AGC 18 MIC+ DLS/MMUTE STAB 10 R5 3.6 k VEE 11 C16 470 nF 7 GAR 5 DTMF QR+ 12 14 15 C15 220 F from dial and control circuits QR- 13 LN IR
Philips Semiconductors
pagewidth
Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
R15 R1 620 16 VCC1 VCC2 R16 56 C1 100 F 392
+
TEA1064A
MUTE PD
-
26
R17 3.3 k
R6
MGR078
Product specification
TEA1064A
Fig.24 Basic application of the TEA1064A with stabilized supply for peripherals, shown here with a piezo-electric earpiece and DTMF dialling. The diode bridge and R10 limit the current into, and the voltage across, the circuit during line transients. A different protection arrangement is required for pulse dialling or register recall.
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
For the basic application giving regulated line voltage the above circuit is changed as follows: - R15 must be short-circuited; - the value of R16 is changed to 392 ; - the value of C3 is changed to 4.7 F.
TEA1064A
handbook, full pagewidth
LN
VCC2 DTMF
VDD DTMF M FL VSS
MGR079
cradle contact
TEA1064A MUTE
PD VEE SLPE
PCD3310
telephone line BST76A
Fig.25 Typical DTMF-pulse set application circuit (simplified) showing the TEA1064A with the CMOS bilingual dialling circuit PCD3310; the broken line indicates optional flash (register recall by timed loop break).
handbook, full pagewidth
LN
VCC2 DTMF
VDD
cradle contact
TEA1064A MUTE
PD VEE SLPE
M DP VSS
PCD332x FAMILY
telephone line BST76A DP/flash
MGR080
Fig.26 Typical pulse dial set application circuit (simplified) showing the TEA1064A with one of the PCD332X family of CMOS interrupted current-loop dialling circuits.
March 1994
27
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
TEA1064A
handbook, full pagewidth
LN
VCC2 DTMF
VDD TONE M DP VSS
cradle contact
TEA1064A MUTE
PD VEE SLPE
PCD3344
telephone line BST76A DP/flash I2C-bus
PCF8577
16-DIGIT LCD
LCD MODULE
MGR081
Fig.27 Typical dual-standard (pulse and DTMF) feature phone application circuit (simplified) showing the TEA1064A and the PCD3344 CMOS telephone microcontroller with on-chip DTMF generator plus I2C-bus.
March 1994
28
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
PACKAGE OUTLINES DIP20: plastic dual in-line package; 20 leads (300 mil)
TEA1064A
SOT146-1
D seating plane
ME
A2
A
L
A1
c Z e b1 b 20 11 MH wM (e 1)
pin 1 index E
1
10
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 4.2 0.17 A1 min. 0.51 0.020 A2 max. 3.2 0.13 b 1.73 1.30 0.068 0.051 b1 0.53 0.38 0.021 0.015 c 0.36 0.23 0.014 0.009 D
(1)
E
(1)
e 2.54 0.10
e1 7.62 0.30
L 3.60 3.05 0.14 0.12
ME 8.25 7.80 0.32 0.31
MH 10.0 8.3 0.39 0.33
w 0.254 0.01
Z (1) max. 2.0 0.078
26.92 26.54 1.060 1.045
6.40 6.22 0.25 0.24
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT146-1 REFERENCES IEC JEDEC EIAJ SC603 EUROPEAN PROJECTION
ISSUE DATE 92-11-17 95-05-24
March 1994
29
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
TEA1064A
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
D
E
A X
c y HE vMA
Z 20 11
Q A2 A1 pin 1 index Lp L 1 e bp 10 wM detail X (A 3) A
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 2.65 0.10 A1 0.30 0.10 A2 2.45 2.25 A3 0.25 0.01 bp 0.49 0.36 c 0.32 0.23 D (1) 13.0 12.6 0.51 0.49 E (1) 7.6 7.4 0.30 0.29 e 1.27 0.050 HE 10.65 10.00 L 1.4 Lp 1.1 0.4 Q 1.1 1.0 0.043 0.039 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z
(1)
0.9 0.4 0.035 0.016
0.012 0.096 0.004 0.089
0.019 0.013 0.014 0.009
0.419 0.043 0.055 0.394 0.016
8o 0o
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT163-1 REFERENCES IEC 075E04 JEDEC MS-013AC EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-01-24 97-05-22
March 1994
30
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (order code 9398 652 90011). DIP SOLDERING BY DIPPING OR BY WAVE The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. REPAIRING SOLDERED JOINTS Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds. SO REFLOW SOLDERING Reflow soldering techniques are suitable for all SO packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement.
TEA1064A
Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 C. WAVE SOLDERING Wave soldering techniques can be used for all SO packages if the following conditions are observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The longitudinal axis of the package footprint must be parallel to the solder flow. * The package footprint must incorporate solder thieves at the downstream end. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. REPAIRING SOLDERED JOINTS Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
March 1994
31
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
TEA1064A
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
March 1994
32
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
NOTES
TEA1064A
March 1994
33
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
NOTES
TEA1064A
March 1994
34
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting
NOTES
TEA1064A
March 1994
35
Philips Semiconductors - a worldwide company
Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 160 1010, Fax. +43 160 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 200 733, Fax. +375 172 200 773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 689 211, Fax. +359 2 689 102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S, Tel. +45 32 88 2636, Fax. +45 31 57 0044 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615800, Fax. +358 9 61580920 France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex, Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427 Germany: Hammerbrookstrae 69, D-20097 HAMBURG, Tel. +49 40 23 53 60, Fax. +49 40 23 536 300 Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS, Tel. +30 1 4894 339/239, Fax. +30 1 4814 240 Hungary: see Austria India: Philips INDIA Ltd, Band Box Building, 2nd floor, 254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025, Tel. +91 22 493 8541, Fax. +91 22 493 0966 Indonesia: PT Philips Development Corporation, Semiconductors Division, Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510, Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3, 20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Pakistan: see Singapore Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA, Tel. +48 22 612 2831, Fax. +48 22 612 2327 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000, Tel. +27 11 470 5911, Fax. +27 11 470 5494 South America: Al. Vicente Pinzon, 173, 6th floor, 04547-130 SAO PAULO, SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 821 2382 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 93 301 6312, Fax. +34 93 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 5985 2000, Fax. +46 8 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. +41 1 488 2741 Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Talatpasa Cad. No. 5, 80640 GULTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 625 344, Fax.+381 11 635 777 Internet: http://www.semiconductors.philips.com
For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1998
SCA60
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
415102/00/02/pp36
Date of release: March 1994
Document order number:
9397 750 nnnnn

▲Up To Search▲

Price & Availability of TEA1064A

	To Download TEA1064A Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .